With the FPGA-based System-on-Module (SoM) “SpiderSoM”, ARIES Embedded, specialist for embedded services and products, presents a basic module for getting started with FPGA programming. Similar to its industrial upgrade MX10, the SpiderSoM is a programmable, non-volatile board based on the Intel® MAX®10 FPGAs. “With the SpiderSoM, we are consciously lowering the entry threshold, opening design work with FPGAs to all development groups,” explained Andreas Widder, Managing Director of ARIES Embedded. “This enables us to reach out to users outside of industrial tasks and to expand the community for the professional information exchange on high-performance FPGA technology. The entry-level SoM offers complete FPGA functionality, including support for various softcore CPUs.
Prompt Project Start and Open Design Concept
ARIES Embedded provides the evaluation board SpiderBase for a fast design start with both SpiderSoM and MX10-SoM. The cost-effective and extremely flexible platform allows users to set up a running system according to the required specifications in a very short time. The board contains a large prototype area. With the SpiderBoard, ARIES Embedded supports the free and open design concept: All resources such as design and Gerber files as well as the source code are available under open source licenses, KiCAD design data under CERN OHL v1.2.
Introduction to FPGA Programming
The SpiderSoM supports Intel MAX®10 FPGAs from 10M02SC to 10M16SA in U169 package with single power supply. The board, with dimensions of 70 by 35 mm, offers GPIO pins and optional 4 Mbit SPI NOR flash, 8 Mbit SDRAM and RTC with battery backup and lithium ion (Li-Ion) or lithium polymer (Li-Po) charger.
The Wiki on spiderboard.org helps users through the first steps with the new platform. Step-by-step instructions like ‘Getting Started’ or an example for the implementation of a RISC-V softcore CPU are available.
MX10-SoM for Industrial Use
For professional electronics designs in industrial applications, ARIES Embedded offers the MX10-SoM for Intel MAX®10-FPGAs from 10M04DC to 10M50DA in the F256 package. To compare to the SpiderSoM, the MX10-SoM also features 128/256/512 Mbit DDR3 DRAM (for 10M 16/25/40/50 FPGAs), a programmable clock generator and PLL with optional external reference input. The 178 FPGA GPIO pins include 13 LVDS transmitters and 54 receivers. The FPGA’s input and output voltages can be configured via programmable, high-efficient power management ICs (PMICs).