Author: lannygass2

PLC2 Design GmbH today announced (L5) Compression IP, a Lightweight, Low Latency, Low Power & Lossless, image compression IP for FPGAs. The IP is packaged with Xilinx AXI-streaming interfaces that can be seamlessly attached to existing image processing applications. With the PLC2 L5 compression, users can achieve state of the art sub-frame latency combined with low power consumption and a lightweight implementation in terms of resource consumption and lossless decompression for a wide range of applications on the edge and in the cloud, without having to invest in new and powerful hardware. The target use cases for PLC2 Design’s L5 ... Read more